A Chopper Instrument Amplifier with High Edo Suppression and Impedance Enhancing Bandwidth

By adopting a digital assisted analog DC servo loop (DSL), a chopper-stabilized capacitive-coupled instrumentation amplifier (CS-CCIA) is proposed. The proposed DSL breaks the design trade-off between electrode <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{D C}$</tex> offset (EDO) suppression and noise performance, achieving a high EDO suppression capability without sacrificing of noise performance. Moreover, to improve the limited input impedance enhancing bandwidth caused by analog DSL, a gain equalization positive feedback (PFB) technique is adopted. The proposed CS-CCIA adopts a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.18 \mu ~\mathrm{m}$</tex> CMOS technology, which shows an EDO suppression range of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\pm 350 \text{mV}$</tex> and an input reference noise of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$40 \text{nV} / \sqrt{\text{Hz}}$</tex>. The proposed gain equalization PFB expands the input impedance enhancing bandwidth to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.16-580 ~\text{Hz}$</tex>, with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{ZIN}&gt;100 \mathrm{M} \Omega$</tex>.