Design Of Dual Redundancy MLVDS System Based On FPGA

In recent years, the MLVDS (Multi Point Low Voltage Differential Signaling) standard has been widely used in serial interfaces. FPGAs are commonly used as transmission and reception chips for MLVDS signals. Compared with the traditional MLVDS protocol based on standard protocols such as UART and SPI, this paper proposes a dual redundant fast response MLVDS system scheme based on FPGA (Field Programmable Gate Array) platform. The half duplex characteristic of the MLVDS standard makes it difficult for the system to switch between transmission and reception in a timely manner, thereby reducing the transmission rate. This design solves this problem by customizing protocols and completing protocol parsing and packet grouping within FPGA. Meanwhile, the design adopts dual redundancy switching to ensure the stability and reliability of the high-speed communication system.