Design and Implementation of High-Speed Camera Concurrent Network and Multi-Core System Based on XCZU7EV
In order to solve the problem of trajectory capture and positioning of high-speed devices, as well as the high-performance requirements of multiple tasks such as real-time data acquisition and image storage processing when processing 1080P@ $\mathrm{5 0 0 F P S}$ high-speed video, this paper proposes a solution based on the XCZU7EV processor of the Zynq UltraScale+ MPSoC series as the hardware platform. The processor integrates a 4-core ARM Cortex-A53 PS and a programmable logic FPGA PL. The FPGA is designed to solve the problem of real-time high-speed image acquisition. The 4 -core ARM is used as the system master to solve the multi-task processing scheduling. Each core can communicate with the FPGA through the internal AXI interconnect bus. The main control system uses the concurrent network software framework to interact with the host client through the Ethernet interface. TCP network services are performed, and the multi-core ARM processor is combined for task scheduling, realizing the extraction and processing of highframe rate images, video output display in SDI format, and storage management and retrieval and upload of high-speed data ECM files. The key functions of multi-task simultaneous execution and efficient event response have been realized, which significantly improves the overall integration and performance of the system.
Authors
- Xin Zheng (ORCID: https://orcid.org/0000-0001-7889-986X)
- Jinling Cui (ORCID: https://orcid.org/0000-0002-7867-0077)
- Qiang Wu (ORCID: https://orcid.org/0000-0001-5641-2483)
- J. He (ORCID: https://orcid.org/0009-0000-9608-9609)
Institutions
- Beijing University of Technology (CN)
Publication Details
- Published
- 2025-03-28
- DOI
- https://doi.org/10.1109/iccai66501.2025.00037
- Primary Topic
- Simulation and Modeling Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.00