An Enhanced Folded Cascode Amplifier for High - Speed Dual - Residue Structure ADCs

Operational transconductance amplifiers are widely used in filters and analog - to - digital converters, and they are common modules in analog integrated circuits. This paper introduces a high - bandwidth and low - noise operational amplifier. This operational amplifier improves the traditional folded cascode operational amplifier. It uses the push - pull structure as the input stage, which increases the transconductance to improve the gain and unity - gain bandwidth. Moreover, a cascode stage is added between the input stage and the output stage to further increase the output impedance and output swing. The circuit is implemented using TSMC 40 nm process and simulated by Cadence. The simulation results show that the amplifier has a DC gain of 54.95 dB, a phase margin of 62°, and a unity - gain bandwidth of 4.07 GHz. The proposed operational amplifier can be used in high - speed ADCs with a double - residue structure.

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Publication Details

Published
2025-05-23
DOI
https://doi.org/10.1109/icccas65806.2025.11102413
Primary Topic
Semiconductor materials and devices
Type
article
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article

An Enhanced Folded Cascode Amplifier for High - Speed Dual - Residue Structure ADCs

Bangyu Yang, Tao Zhang, Haijun Lin, Xiao Yang
Semiconductor materials and devices
article

An Enhanced Folded Cascode Amplifier for High - Speed Dual - Residue Structure ADCs

Bangyu Yang, Tao Zhang, Haijun Lin, Xiao Yang
article en

Abstract

Operational transconductance amplifiers are widely used in filters and analog - to - digital converters, and they are common modules in analog integrated circuits. This paper introduces a high - bandwidth and low - noise operational amplifier. This operational amplifier improves the traditional folded cascode operational amplifier. It uses the push - pull structure as the input stage, which increases the transconductance to improve the gain and unity - gain bandwidth. Moreover, a cascode stage is added between the input stage and the output stage to further increase the output impedance and output swing. The circuit is implemented using TSMC 40 nm process and simulated by Cadence. The simulation results show that the amplifier has a DC gain of 54.95 dB, a phase margin of 62°, and a unity - gain bandwidth of 4.07 GHz. The proposed operational amplifier can be used in high - speed ADCs with a double - residue structure.

Huaqiao University (CN), Xiamen University of Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 81%
Semiconductor materials and devices
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