Adaptive Bulk Voltage Generator for Low-Voltage Rail-To-Rail Input Stage in Amplifiers

This paper proposes an adaptive bulk voltage generator (ABVG) for conventional low-voltage rail-to-rail input operational amplifiers. The ABVG primarily consists of two components: dummy MOS differential pair and a bulk voltage generator (Vbulk_G). The dummy MOS differential pair samples the input signal's common-mode voltage (VCM) and transmit the source voltage, which varies with the input VCM, to Vbulk_G. Simultaneously, Vbulk_G monitors the drain voltage of the input differential pair and the source voltage of the dummy MOS pair. By utilizing an offset comparator to track the operating state of the input stage, Vbulk_G generates a continuously varying voltage (Vbulk) as the substrate bias voltage for the input transistors. Leveraging the body effect under different VCM conditions, the proposed ABVG reduces the minimum operating voltage of traditional nmos-pmos rail-switching rail-to-rail input stage while expanding the input VCM range. The ABVG was designed using a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.18 \mu \mathrm{m}$</tex> CMOS process and verified through simulations. The results demonstrate that, compared to conventional bulk biasing methods, the proposed structure achieves a minimum operational amplifier supply voltage of 1.6 V across all process corners, an input VCM range of −0.3 V to VDD +0.3 V, and a relatively stable transconductance (Gm) across the entire common-mode range.

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Publication Details

Published
2025-05-17
DOI
https://doi.org/10.1109/icet64964.2025.11103339
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

Adaptive Bulk Voltage Generator for Low-Voltage Rail-To-Rail Input Stage in Amplifiers

Xing Zhang, Qiuping Li, B. Ding
Analog and Mixed-Signal Circuit Design
article

Adaptive Bulk Voltage Generator for Low-Voltage Rail-To-Rail Input Stage in Amplifiers

Xing Zhang, Qiuping Li, B. Ding
article en

Abstract

This paper proposes an adaptive bulk voltage generator (ABVG) for conventional low-voltage rail-to-rail input operational amplifiers. The ABVG primarily consists of two components: dummy MOS differential pair and a bulk voltage generator (Vbulk_G). The dummy MOS differential pair samples the input signal's common-mode voltage (VCM) and transmit the source voltage, which varies with the input VCM, to Vbulk_G. Simultaneously, Vbulk_G monitors the drain voltage of the input differential pair and the source voltage of the dummy MOS pair. By utilizing an offset comparator to track the operating state of the input stage, Vbulk_G generates a continuously varying voltage (Vbulk) as the substrate bias voltage for the input transistors. Leveraging the body effect under different VCM conditions, the proposed ABVG reduces the minimum operating voltage of traditional nmos-pmos rail-switching rail-to-rail input stage while expanding the input VCM range. The ABVG was designed using a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.18 \mu \mathrm{m}$</tex> CMOS process and verified through simulations. The results demonstrate that, compared to conventional bulk biasing methods, the proposed structure achieves a minimum operational amplifier supply voltage of 1.6 V across all process corners, an input VCM range of −0.3 V to VDD +0.3 V, and a relatively stable transconductance (Gm) across the entire common-mode range.

Peking University (CN), Peking University Shenzhen Hospital (CN)
Affordable and clean energy
Openalex Percentile: Top 81%
Analog and Mixed-Signal Circuit Design
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