Two-Dimensional MoS₂ Logic Inverter

Inverters are crucial in digital electronics as building blocks of logic circuits. The overall functionality of integrated circuits strongly depends on the performance of their components, whose continuous improvement is a key area of research. However, conventional inverter circuits, typically based on bulk semiconductors, face several limitations, including limited scalability, increasing power consumption, and significant transit time. Two-dimensional (2D) materials with unique electrical properties offer a potential solution to overcome these constraints. In this work, we fabricate and investigate the electrical properties of a resistive load inverter entirely based on molybdenum disulfide (MoS<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>). A thinner MoS<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> flake is used as the channel of the inverter's driver transistor, exhibiting an n-type behaviour with a high I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio of 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> and mobilities up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$19 \text{cm}^{2} \mathrm{V}^{-1} \mathrm{s}^{-1}$</tex> for <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{ds}}=1 \mathrm{V}$</tex>. The resistive load of the circuit consists of a thicker flake, which demonstrates lower gate tunability and higher conductivity. Specifically, it shows an I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio smaller than 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup> and mobility as high as <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$34 \text{cm}^{2} \mathrm{V}^{-1} \mathrm{s}^{-1}$</tex> for <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{ds}}=1 \mathrm{V}$</tex>. The inverter presents a maximum output voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{V}_{\max}=1 \mathrm{V}$</tex> and a minimum output voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{V}_{\min}=0.65 \mathrm{V}$</tex>. It is also characterized by large noise margins, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{NM}_{\mathrm{L}}=0.94 \mathrm{V}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{NM}_{\mathrm{H}}=0.65 \mathrm{V}$</tex>. Moreover, a possible strategy to enhance the inverter efficiency is discussed by analyzing different load resistances. This work highlights MoS<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>-based inverters as a promising step toward low-power and scalable nanoelectronics.