Research on Security Technologies for RISC-V SoC Based on Permission Management

The rapid development of RISC-V CPUs brings significant development opportunities for China's system on chip (SoC) technology and Internet of Things (IoT) industry. However, IoT devices are often operated in untrusted physical environments, lack hardware security measures, and are vulnerable to attacks, posing a significant security risk. This article focuses on hardware level secure boot technology for chips, providing a complete secure hardware boot solution based on permission management and a national security algorithm service solution. Specifically, it includes: 1) security feature permission management based on different security feature ID registers; 2) All security features are initialized, managed, and provided with security services to upper level software by ROM firmware; 3) Only requests that pass signature verification and security permission management authentication are allowed to access ROM data; 4) Only requests that have passed signature verification and security permission management authentication are allowed to access security modules such as SM2, SM3, SM4, TRNG, etc. Through the above design, the security module and security permissions are managed by the secure ROM firmware. Access requests that have not passed signature verification and security permission management authentication cannot access ROM data, thus maximizing the physical security of ROM data. Access requests that have passed signature verification and security permission management authentication cannot access the security module, greatly increasing the difficulty of chip attacks.

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Publication Details

Published
2025-05-17
DOI
https://doi.org/10.1109/icet64964.2025.11103069
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
Type
article
Field-Weighted Citation Impact
0.00
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article

Research on Security Technologies for RISC-V SoC Based on Permission Management

Hailiang Liu, Hui Lv, Wensheng Yang
Physical Unclonable Functions (PUFs) and Hardware Security
article

Research on Security Technologies for RISC-V SoC Based on Permission Management

Hailiang Liu, Hui Lv, Wensheng Yang
article en

Abstract

The rapid development of RISC-V CPUs brings significant development opportunities for China's system on chip (SoC) technology and Internet of Things (IoT) industry. However, IoT devices are often operated in untrusted physical environments, lack hardware security measures, and are vulnerable to attacks, posing a significant security risk. This article focuses on hardware level secure boot technology for chips, providing a complete secure hardware boot solution based on permission management and a national security algorithm service solution. Specifically, it includes: 1) security feature permission management based on different security feature ID registers; 2) All security features are initialized, managed, and provided with security services to upper level software by ROM firmware; 3) Only requests that pass signature verification and security permission management authentication are allowed to access ROM data; 4) Only requests that have passed signature verification and security permission management authentication are allowed to access security modules such as SM2, SM3, SM4, TRNG, etc. Through the above design, the security module and security permissions are managed by the secure ROM firmware. Access requests that have not passed signature verification and security permission management authentication cannot access ROM data, thus maximizing the physical security of ROM data. Access requests that have passed signature verification and security permission management authentication cannot access the security module, greatly increasing the difficulty of chip attacks.

Chengdu Tool Research Institute (China) (CN)
Openalex Percentile: Top 78%
Physical Unclonable Functions (PUFs) and Hardware Security
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