CESL Process Prediction Based on Convolution Neural Network with IC Manufacture Database

Contact Etch Stop Layer (CESL) process optimization is critical for enhancing semiconductor device performance. Traditional optimization methods based on manual experience and iterative experiments are inefficient and costly. In this study, we propose a high-accuracy convolutional neural network (CNN)-based framework for CESL process prediction. Leveraging WAT data collected from semiconductor fabrication lines, our approach employs multiple CNN architectures to map complex electrical test parameters to optimal CESL process recipes. Experimental results demonstrate that the CNN model achieves superior prediction accuracy, with a MAE of 0.017, MSE of 0.0021, and an <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{R}^{\mathbf{2}}$</tex> score of 0.9885, significantly outperforming traditional machine learning algorithms. Furthermore, we systematically evaluate the robustness of CNN models under varying data scales, revealing their consistent advantages in both small-sample and large-scale scenarios. The proposed method not only provides a data-driven solution for CESL process optimization but also highlights the potential of deep learning in addressing intricate semiconductor manufacturing challenges. Moreover, to address the need for discrete recipe selection in certain manufacturing scenarios, we extend the framework to include a classification task, which categorizes process recipes into discrete classes. The classification model achieves an accuracy of 97.02 %, precision of 97.06 %, recall of 97.25 %, and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$F 1$</tex>-score of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{9 6. 9 9 \%}$</tex>, providing a robust solution for discrete recipe decisionmaking.