High Performance Wide Trench Fin-Shaped Gate CSTBT with Split Gate Structure

A novel high performance wide trench fin-shaped gate carrier stored trench bipolar transistor (CSTBT) with splitgate structure (WTFSG-CSTBT) is proposed. The proposed structure features an emitter-connected split-gate with thick oxide layer under the fin-shaped gate in the wide trench of the CSTBT. Compared with the conventional wide trench fin-shaped gate CSTBT (WTFG-CSTBT), the proposed structure not only reduces gate-collector capacitance (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$C_{\text{GC}}$</tex>) but also alleviates negative impact of concentration of CS layer (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N_{\text{CS}}$</tex>) on breakdown voltage (BV) through shielding effect provided by the split gate with a thick oxide layer. Therefore, the proposed structure permits a higher <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$N_{\text{CS}}$</tex> with almost the same BV, thereby further reducing onstate voltage drop (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{CEON}}$</tex>). Simulation results show that compared to the conventional WTSG-CSTBT, the proposed structure reduces <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{CEON}$</tex> from 1.22V to 1.12V and increases the BV from 1237V to 1304V. In addition, the proposed device also shows a reduction of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$C_{GC}$</tex> at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{CE}$</tex> of 25 V by 81.7% and Miller plateau charge (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$Q_{GC}$</tex>) by 46.4%. As a result, the trade-off between the Vceon and turn-off loss (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$E_{OFF}$</tex>) of the proposed device is significantly improved. At the same <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$V_{\text{CEON}}$</tex> of 1.12V, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$E_{\text{off}}$</tex> of the WTFSG-CSTBT is reduced by 33.6% compared to the conventional one.