High-Speed Direct-Digital Frequency Synthesizer Architecture Using RFDACs
To address the urgent demand for high-purity spectral signals in broadband high-speed communication systems, a high-speed direct digital synthesizer (DDS) based on RFDAC is proposed. This design aims to overcome the limitations of traditional DDS systems, such as low output frequency and random spurious signals, which significantly degrade spectral purity. The proposed frequency synthesizer adopts a parallel multi-phase processing DDS architecture and integrates a JESD204C interface to enable high-speed operation. Additionally, an adaptive spurious cancellation module is designed to generate a signal with identical frequency and amplitude but opposite phase to the spurious signals, effectively suppressing them. Test results demonstrate that the proposed high-speed DDS can achieve an output frequency of up to 5 GHz with a spurious suppression capability exceeding 20dB.
Authors
- Rui Cao
- J. Zhang
- Fang Qiu (ORCID: https://orcid.org/0000-0003-4966-2032)
- Renhua Deng (ORCID: https://orcid.org/0000-0001-7217-5772)
- Guangming Wang (ORCID: https://orcid.org/0000-0003-3402-1443)
- Wei Liu (ORCID: https://orcid.org/0000-0001-8257-0397)
- Wenguang Li (ORCID: https://orcid.org/0000-0001-9622-396X)
- Lamin Zhan (ORCID: https://orcid.org/0000-0003-2090-3189)
- Qiong Wu (ORCID: https://orcid.org/0000-0003-4640-9672)
Institutions
- Southwestern University of Finance and Economics (CN)
- Wuhan College (CN)
Publication Details
- Published
- 2025-05-17
- DOI
- https://doi.org/10.1109/icet64964.2025.11102833
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00