High Efficiency Optimization Design Method for Low Dropout Regulator
To improve the design efficiency, the optimization method with high effectiveness for low dropout regulator (LDO) is presented. The data for LDO can be obtained through Cadence software. Based on the simulated database, the mapping relationship between the circuit indexes and performance can be established by residual neural networks (ResNet) models. According to requirements, the optimization function is proposed. Then, based on the established ResNet models and optimization function, particle swarm optimization (PSO) algorithm is adopted to find the optimal parameters. The optimized static current (Q<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</inf>) is 1.04 μA under meeting the constraints. Compared with the other work, the Qc is decreased by 97.1%, and the simulation time decreases by 94%, which greatly proves the proposed method is highly efficiency.
Authors
- Yunqi Yang (ORCID: https://orcid.org/0000-0002-7045-082X)
- Dongdong Chen (ORCID: https://orcid.org/0000-0001-5892-6891)
- Yintang Yang (ORCID: https://orcid.org/0000-0001-9745-5404)
- Di Li (ORCID: https://orcid.org/0000-0003-1674-0110)
Institutions
- Xidian University (CN)
Publication Details
- Published
- 2025-05-23
- DOI
- https://doi.org/10.1109/ecis65594.2025.11086994
- Citations
- 1
- Primary Topic
- Embedded Systems and FPGA Design
- Type
- article
- Field-Weighted Citation Impact
- 1.21
Funders
- Xidian University
- Innovation Fund
- Research and Development