Energy-Efficient Multi-Precision CNN Acceleration Using Single-Bit RRAM Architecture with Dynamic Quantization

Convolutional Neural Networks (CNNs), as a core component of deep learning, have achieved groundbreaking results in various application domains, particularly in tasks such as computer vision and speech recognition. However, as CNN models continue to grow in complexity, the computational and storage overheads have also increased, leading to energy efficiency and latency becoming bottlenecks in both training and inference processes. To address this issue, this paper proposes a configurable multi-precision CNN computing framework based on single-bit Resistive Random-Access Memory (RRAM). The framework employs a software-hardware co-design approach, integrating quantization algorithms, pruning optimization, and parallel computing techniques to achieve lower storage consumption and latency while maintaining accuracy comparable to full-precision CNNs. Specifically, we design a dynamic quantization precision adjustment scheme that adaptively selects the precision for each layer based on hardware resources and computational demands. Additionally, we propose a quantization optimization model to address hardware computation deviations and design a multi-precision RRAM architecture. Experimental results demonstrate that the framework reduces computational area by approximately 70% and computational energy by 75%, while achieving an energy efficiency improvement of 6.1 to 8.6 times compared to existing RRAM-based accelerators, with only a 1.07% increase in area overhead.