ECG Signal Processing on an FPGA Using the Discrete Wavelet Transform

This work presents the design and hardware implementation of a wavelet filter bank for the pre-processing of electrocardiographic (ECG) signals using an FPGA platform. The objective is to improve signal quality prior to feature extraction in ischemia detection systems, while ensuring low power consumption and hardware efficiency suitable for embedded applications.The proposed system is implemented in VHDL and uses fixed-point arithmetic (Q4.8 format) to minimize resource usage without compromising signal fidelity. The wavelet-based filter bank allows for efficient frequency decomposition, enabling the suppression of noise components while preserving clinically relevant waveform features.The design is validated through simulations in MATLAB and synthesized on an Artix-7 FPGA using the Vivado development environment. The synthesized architecture required only 177 lookup tables (LUTs) and 175 flip-flops, without the need for DSP slices or block RAMs. These results confirm the suitability of the approach for low-power wearable or portable ECG monitoring devices.This work also addresses the lack of implementation detail commonly found in the literature by providing a complete and replicable methodology, from signal quantization and filter coefficient selection to fixed-point implementation and FPGA synthesis.