Design Method of Distributed Decoupling Capacitors for Both Voltage Overshoot Suppression and Dynamic Current Sharing in SiC MOSFET Power Module

The silicon carbide metal-oxide semiconductor field effect transistor (SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet)</small> is widely recognized for its exceptional performance attributes. However, two primary issues restrict the operational capabilities of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> power modules. The first issue is that the rapid switching speed leads to significant voltage overshoot upon turn-<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>, thereby limiting the operating voltage. The second issue is the imbalanced currents among the paralleled dies, resulting in uneven junction temperature. To address these challenges, this article introduces a method to suppress voltage overshoot and achieve balanced dynamic currents by integrating distributed decoupling capacitors in a multichip SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> power module. The peak voltage values of the two-frequency oscillations are calculated, which serve as the foundation for selecting the capacitance values. Subsequently, a circuit model of the power module incorporating the distributed decoupling capacitors is constructed. The values of the distributed capacitances are selected to adjust the equivalent source impedances to match the impedance of the lowest paralleled branch. The experimental results demonstrate that the proposed method can reduce the voltage overshoot from 48.0% to 12.8% and decrease the current imbalance degree from over 60% to approximately 5%. The experimental results validate the ability of the proposed method to achieve low voltage overshoot and balanced dynamic currents.