Investigating the Impact of p-Bit Non-Idealities on Solving Complex Optimization Problems

We perform a simulation study to effectively utilize SiOx-based threshold switching (TS) devices as probabilistic bits (p-Bits) for solving complex optimization problems (COPs), providing design guidelines for p-Bit development. Thin SiOx films, incorporating Ti scavenging layers to induce oxygen vacancies as intrinsic entropy sources, exhibit TS behavior with high variability. This variability gives rise to stochastic output voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm{V}}_{\mathrm {out}}$ </tex-math></inline-formula>) spike generation in response to input voltage (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\mathrm{V}}_{\mathrm {in}}$ </tex-math></inline-formula>) pulses. Notably, the number of Vout spikes is inversely correlated with the Vin amplitude, resulting in a sigmoidal probability distribution. However, in practical scenarios, deviations from ideal probability distributions are frequently observed due to device variability or failure. Thus, we categorize the experimentally observed p-Bit behaviors into several notable types: 1) ideal sigmoidal response, 2) linear response, 3) Vout oscillations with deterministic outcomes (100% or 0% spike probability), and 4) transitions from sigmoid or linear behavior to random output. We then investigate how these non-ideal, device-level p-Bit characteristics affect system-level performance in two representative COP applications. First, by implementing simulated annealing algorithms in MATLAB to solve the vehicle routing problem, we demonstrate that p-Bits with sigmoidal probability responses can accelerate the discovery of optimal routing paths. Second, we show that the tunable stochastic behavior of p-Bits facilitates inverted logic gate operations, where outputs are fixed and inputs are inferred probabilistically. This probabilistic logic approach enables robust clause evaluation and effective resolution of the maximum satisfiability problem, even under device-level uncertainty. Furthermore, the demonstrated logic gate operations using stochastic p-Bits enable secure and parallelizable encryption and decryption schemes, offering a reconfigurable, memory-less alternative to conventional hardware-based cryptographic systems. The ability to construct reliable logic gates from stochastic p-Bits represents a foundational advancement toward implementing hardware-level probabilistic computing systems.