Zirconium‐Rich Strategy in Ultrathin Hf _0.5 Zr _0.5 O ₂ toward Back‐End‐of‐Line‐Compatible Ferroelectric Random Access Memory

HfO₂-based ferroelectric devices have garnered lots of attention in embedded memory due to its exceptional complementary metal oxide semiconductor (CMOS) compatibility as well as sub-10 nm scalability. Nevertheless, challenges such as double remanent polarization (2P_r) degradation and thermal budget issues while scaling the Hf_0.5Zr_0.5O₂ (HZO) thickness have limited its integration in high-intensity memory and high-speed computing. Here, an effective strategy involving the zirconium-rich layer (Zr-RL) is developed to address this dilemma. Remarkably low operating voltage of 1.0 V, alongside exceptional ferroelectricity with 2P_r of 43.4 µC cm^-2 and a coercive voltage of 0.75 V are achieved in the ferroelectric capacitor with sub-6 nm HZO/Zr-RL/HZO stack. First-principles calculations reveal that the incorporation of Zr-RL induces a 0.76% tensile strain, which effectively reduces the growth barrier and surface energy of the ferroelectric phase, thereby facilitating the crystallization of the HZO/Zr-RL/HZO stack under a low thermal budget. Moreover, robust reliability, including a high breakdown voltage of 3.69 V, superior endurance characteristics exceeding 10¹¹ cycles, and excellent retention time of 10 years are demonstrated in the ferroelectric capacitor with HZO/Zr-RL/HZO stack. Our investigations provide new insights into building a low-voltage operation, high ferroelectricity and reliability, long data retention, and back-end-of-line-compatible ferroelectric random access memory in scaled CMOS technology nodes.