An Agile Design Method for Reconfigurable Spatial Accelerators in Tensor Computation

Tensor computations are widely applied in various fields, driving the development of specialized hardware accelerators that deliver exceptional computational performance while maintaining energy efficiency. Previous automated design methodologies face significant limitations in terms of development overhead and adaptability to emerging tensor computation requirements. To address these challenges, we present an agile design methodology for generating reconfigurable spatial accelerators specifically optimized for tensor computations. Our proposed approach generates accelerators with dynamic reconfiguration capabilities, enabling adaptation to diverse tensor computation patterns while significantly enhancing hardware flexibility and resource utilization. Experimental results demonstrate that the reconfigurability of our generated accelerators eliminates the necessity for repeated accelerator regeneration while achieving substantial performance gains of up to 1.6× compared to conventional CPU implementations.