An Integrable Analog Domain Linearization Architecture for the Power Amplifiers in MIMO Systems
This study introduces a delay-compensated analog linearization framework to address nonlinear distortion in multi-input multi-output (MIMO) power amplifiers (PAs). The core design integrates a nonlinear distortion extraction loop and a tunable cascaded stage spectral notching structure. By dynamically adjusting the group delay and attenuation coefficients, the proposed framework achieves frequency-selective suppression performance of intermodulation distortion (IMD), particularly in dynamic beamforming scenarios. Experimental validation on a GaN PA (CMPA006002F) demonstrates a 6 dB improvement in adjacent channel power leakage ratio (ACLR) at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$780 \mathbf{~ M H z}$</tex> with a three ns feedback latency, outperforming prior single-branch architectures in suppression bandwidth.
Authors
- Ying Liu (ORCID: https://orcid.org/0000-0001-9667-4904)
- Shihai Shao (ORCID: https://orcid.org/0000-0001-6554-4154)
- Xiaozheng Wei (ORCID: https://orcid.org/0009-0004-7059-7380)
- Wensheng Pan (ORCID: https://orcid.org/0000-0002-4470-7644)
- Wanzhi Ma (ORCID: https://orcid.org/0000-0001-5736-2350)
- Qiang Xu (ORCID: https://orcid.org/0000-0002-6111-8681)
Institutions
- University of Electronic Science and Technology of China (CN)
Publication Details
- Published
- 2025-06-15
- DOI
- https://doi.org/10.1109/ims40360.2025.11104005
- Primary Topic
- Advanced Power Amplifier Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China