A $71-76 \text{GHz}$ Phased-Array Transmitter with Nested-Coupler-Based Phase Shifter in 65 NM CMOS

This paper presents a four-element phased-array transmitter in 65 nm CMOS operating in the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$71-76 \text{GHz}$</tex> band. The transmitter features a nested-coupler-based phase shifter, achieving a full 360° phase-shifting range with a fine 5.625° phase resolution and an <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{r m s}$</tex> phase error of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1. 0 1 - 1. 1 7}{ }^{\circ}$</tex>. Phase shifting is achieved by vector modulation after the proposed nested coupler, using integrated digital-assisted cancellation-based variable gain amplifiers (VGAs) to adjust the I/Q signal amplitude. The transmitter demonstrates a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$12-\text{dB}$</tex> attenuation range with a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1-\text{dB}$</tex> attenuation step, and achieves a peak saturated output power (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{P}_{\text {sat }}$</tex>) of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1 2. 5 dBm}$</tex> at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{76 GHz}$</tex> and a maximum output power <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{1 - d B}$</tex> compression point (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{OP}_{1 \text{dB}}$</tex>) of 8.3 dBm at 73 GHz. The chip only occupies a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1.55 \times 1.61 \text{mm}^{2}$</tex> area and burns 184 mW per channel from a 1-V supply, making it well suited for high-performance, low-power, and highly integrated phased-array applications.