Simulation and Exploration for Multi-Chiplet Systems using Open-Source Tools and Heuristic Algorithm

While chiplet-based architectures offer transformative potential for sustaining Moore’s Law through heterogeneous integration, existing simulation methodologies face critical limitations in modeling memory hierarchies and optimizing system-level metric tradeoffs. Current open-source toolchains lack sufficient memory subsystem fidelity, and design space exploration remains computationally intractable for complex chiplet arrangements. In this work, we propose a framework for the simulation and exploration of multi-chiplet systems based on open-source tools. First, we extend the open-source LegoSim simulator by integrating DRAMSim3, enabling efficient simulation of memory chiplets with improved accuracy in timing, bandwidth, and power consumption. Additionally, we propose a heuristic algorithm-based method to optimize simulator configurations, balancing IPC and power consumption. Experimental results show significant IPC improvements while maintaining low power, providing a robust solution for Chiplet design space exploration.