Simulating CXL Shared Coherent Memory Using Shared Memory Among Virtual Machines

Compute Express Link (CXL) has emerged as a promising interconnect standard for connecting CPU, memory, and devices with coherent cache memory access. A key feature in CXL 3.0 is the ability to enable shared coherent memory among across hosts, which enables multiple systems to share data structures, perform synchronization, or pass messages using low-latency load-store semantics. However, CXL 3.0 has just been announced and lacks real-world realization. This paper explores a simulation method of the CXL shared coherent memory by using the shared memory among co-resident virtual machines, which aims to provide insights into the potential performance characteristics. First, we present the simulation method for shared coherent memory by mapping the physical address spaces of different virtual machines to the same host physical address space, achieved by modifying the address translation in the page fault handler of the extended page table in the KVM module. Next, we analyze the synchronization mechanisms required for shared coherent memory in kernel space and user space and introduce shared memory spinlocks and semaphores to enable efficient data access. We implement shared coherent memory in the Linux kernel. Experimental results show that sharing data through the shared coherent memory mechanism is 62.9x faster than the traditional virtual network.

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Published
2025-05-09
DOI
https://doi.org/10.1109/iseda65950.2025.11100479
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
0.00

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Simulating CXL Shared Coherent Memory Using Shared Memory Among Virtual Machines

Weichen Liu, Ting Wu, Zhulin Ma, Linbo Long et al.
Parallel Computing and Optimization Techniques
article

Simulating CXL Shared Coherent Memory Using Shared Memory Among Virtual Machines

Weichen Liu, Ting Wu, Zhulin Ma, Linbo Long, Hang Tian, Qiushuang Yu
article en

Abstract

Compute Express Link (CXL) has emerged as a promising interconnect standard for connecting CPU, memory, and devices with coherent cache memory access. A key feature in CXL 3.0 is the ability to enable shared coherent memory among across hosts, which enables multiple systems to share data structures, perform synchronization, or pass messages using low-latency load-store semantics. However, CXL 3.0 has just been announced and lacks real-world realization. This paper explores a simulation method of the CXL shared coherent memory by using the shared memory among co-resident virtual machines, which aims to provide insights into the potential performance characteristics. First, we present the simulation method for shared coherent memory by mapping the physical address spaces of different virtual machines to the same host physical address space, achieved by modifying the address translation in the page fault handler of the extended page table in the KVM module. Next, we analyze the synchronization mechanisms required for shared coherent memory in kernel space and user space and introduce shared memory spinlocks and semaphores to enable efficient data access. We implement shared coherent memory in the Linux kernel. Experimental results show that sharing data through the shared coherent memory mechanism is 62.9x faster than the traditional virtual network.

Chongqing University of Posts and Telecommunications (CN), Nanyang Technological University (SG)
Ministry of Education, Chongqing Municipal Education Commission
Openalex Percentile: Top 79%
Parallel Computing and Optimization Techniques
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