A 13.7-41 GHz Ultra-Wideband Frequency Doubler with Cross-Coupled Push-Push Structure Achieving 10.6% Peak Efficiency and 7-dBm Psat

This paper presents a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$13.7-41 \text{GHz}$</tex> frequency doubler with high conversion gain and efficiency. A cross-coupled push-push structure is proposed to increase the high-frequency output power and extend the bandwidth. In addition, an output-matching network based on the coupled inductor is adopted to further extend the bandwidth to low frequencies. Fabricated in a 40 nm CMOS process, the proposed frequency doubler achieves a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3-\text{dB}$</tex> bandwidth of 27.3 GHz (fractional bandwidth of 99.8 %) and a peak conversion gain of -2.7 dB at an input power of 3 dBm. The measured saturated output power is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$7 \text{dBm}$</tex> and the measured peak power-added efficiency is 10.6 %. Across the entire bandwidth, the fundamental harmonic rejection ratio and the third harmonic rejection ratio are greater than 21.3 dBc and 35.6 dBc, respectively. The maximum DC power consumption is 24 mW, and the core area is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.3 \times 0.4 ~\text{mm}^{2}$</tex>.