Addressing Continuity and Expressivity Limitations in Differentiable Physical Optimization: A Case Study in Gate Sizing

Differentiable optimization is popular for its efficiency and explainability. However, it faces limitations due to its reliance on continuous formulations and constraints on objective expressivity. To address these challenges, we propose a framework combining differentiable methods with gradient clipping and calibration strategies to ensure efficient and targeted optimization. Gate sizing, a key challenge in chip PPA optimization, exemplifies all the challenges with its discrete nature and objective complexity. Applying our proposed differentiable framework to gate sizing, we outperform top contestants in the 2024 ICCAD CAD gate sizing contest in overall quality scores and runtime, with excellent and balanced performance on all important evaluation metrics.

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Publication Details

Published
2025-05-09
DOI
https://doi.org/10.1109/iseda65950.2025.11100319
Citations
1
Primary Topic
VLSI and FPGA Design Techniques
Type
article
Field-Weighted Citation Impact
0.73
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article

Addressing Continuity and Expressivity Limitations in Differentiable Physical Optimization: A Case Study in Gate Sizing

Yibo Lin, Runsheng Wang, David Z. Pan, Zizheng Guo et al.
1 citations
VLSI and FPGA Design Techniques
0.73
article

Addressing Continuity and Expressivity Limitations in Differentiable Physical Optimization: A Case Study in Gate Sizing

Yibo Lin, Runsheng Wang, David Z. Pan, Zizheng Guo, Zhili Xiong, Y. C. Hsu, Yufan Du, Seunggeun Kim
article en
1 citations

Abstract

Differentiable optimization is popular for its efficiency and explainability. However, it faces limitations due to its reliance on continuous formulations and constraints on objective expressivity. To address these challenges, we propose a framework combining differentiable methods with gradient clipping and calibration strategies to ensure efficient and targeted optimization. Gate sizing, a key challenge in chip PPA optimization, exemplifies all the challenges with its discrete nature and objective complexity. Applying our proposed differentiable framework to gate sizing, we outperform top contestants in the 2024 ICCAD CAD gate sizing contest in overall quality scores and runtime, with excellent and balanced performance on all important evaluation metrics.

King University (US), Peking University (CN), The University of Texas at Austin (US)
Openalex Percentile: Top 25%
VLSI and FPGA Design Techniques
0.73
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Addressing Continuity and Expressivity Limitations in Differentiable Physical Optimization: A Case Study in Gate Sizing — Yibo Lin, Runsheng Wang, et al. · (2025) | TGRS Research Map | TGRS