A 230-GHZ 3.5-DBM Phase-Shifter-Embedded Frequency Tripler with 360° Phase-Shifting Range in 40-NM CMOS

A <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$230-\text{GHz}$</tex> phase-shifter-embedded (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \varphi$</tex>-embedded) frequency tripler (FT) for sub-THz phased-array applications is proposed in this work. The FT's driver amplifier incorporates <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \varphi$</tex> embedded impedance matching networks, which can simultaneously realize <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$&gt;120^{\circ}$</tex> phase shifting, impedance transformation, and single-ended to differential conversion, effectively reducing insertion loss and chip area. Moreover, a fundamental voltage tuning technique is proposed to mitigate the transistor's voltage breakdown limitations. This enables the FT to reliably handle higher input power, significantly enhancing the output power by 2.5 dB. Fabricated in a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$40-\text{nm}$</tex> CMOS process without ultra-thick metal layers available, the proposed FT can deliver an output power of 3.5 dBm and conversion gain of 0.5 dB at 225 GHz with a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3-\text{dB}$</tex> bandwidth from 214 to 246 GHz while consuming 230 mW from a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.9-\mathrm{V}$</tex> supply. The phase-shifting range can exceed 360° across the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$220-{}$</tex> to- 245 GHz frequency range.