A TSPC mm-Wave Frequency Divider with up to 50 GHz Input Frequency in 12 nm FinFET Bulk CMOS

This paper presents a digital frequency divider that utilizes two dynamic TSPC flip-flops for a division ratio of four. The circuit operates over a wide supply voltage range spanning from 0.4 V to 1.0 V and reaches operating frequencies of at least 50 GHz limited by measurement equipment. The circuit draws 560 μA from a 0.7 V supply and achieves a locking range of above 48 GHz with a fixed bias and supply voltage. The demonstrated divider circuit is fabricated in a 12 nm Bulk CMOS FinFET node and occupies a core area of only 2.7 μ<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>, while achieving similar performance to RF frequency dividers fabricated in SOI process nodes. To the best of the authors' knowledge, the presented circuit is the first mm-wave frequency divider built in a FinFET process reaching an operating frequency of 50 GHz while having the smallest reported chip area consumption found in literature.