A Post-Layout Driven Analog Circuit Automatic Sizing Framework Verified With A Rail-to-Rail Operational Amplifier

Automated solutions for analog circuits sizing and layout have garnered considerable interest owing to the labor-intensive nature of this task in a typical design cycle, particularly amidst technology advancements and circuit scaling. In this paper, we propose a post-layout driven automatic parameter sizing framework for analog circuits. For the given analog topology, the framework can generate the layout, evaluate its performance based on post-layout simulation, and iteratively move on to the best sizing solution based on the black-box optimization algorithm. The framework incorporates MAGICAL, the open-source AMS layout synthesis system, for fast layout generation. The zeroth-order optimization algorithm is employed to rapidly converge to the optimal circuit size. To verify the effectiveness of the proposed framework, a two-stage rail-to-rail operational amplifier with high Gain is designed and fabricated using CSMC 0.25μm BCD technology. Measurement results show that the prototyped chip achieve excellent metrics, including a Gain of 133dB, a phase margin of 70.4°, and a power consumption of 2.67mW.