Miniaturized D-Band SPDT/DPDT Switches Using Series Triple Coupled Transformer Cores in $65-\text{nm}$ CMOS SOI

This paper presents a novel SPDT/DPDT switch topology using a series triple coupled transformer (STCT) core, suitable for miniaturized millimeter-wave and terahertz systems. By controlling the ports' impedances of the six-ports STCT core, the high-order band-pass/band-stop response is realized, featuring low transmission loss or high isolation between ports. Additionally, the core occupies a highly compact area, making it suitable for the design of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1 \times 2 / 2 \times 2$</tex> switches and switch matrices. Fabricated in a 65 nm CMOS SOI process, D-band SPDT/DPDT switches using the STCT core achieve a minimum insertion loss of 2.4 dB and 4.0 dB, with isolation greater than 19 dB and 31 dB from 110 GHz to 148 GHz. The core area of SPDT/DPDT switches is only <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.0028 ~\text{mm}^{2}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.0058 ~\text{mm}^{2}$</tex>, respectively.