1.9 GHz – 4.1 GHz CMOS Rectifier with Over 48% Efficiency Using Inductive Feedback and CRT Reduction for Beamforming WPT

This letter presents the design of an ultrawideband half-wave CMOS rectifier with maximum flat efficiency using an inductive feedback technique. First, a diode model for high-frequency rectification is proposed by connecting a small capacitor between the drain and ground terminal to reduce clock recovery time (CRT). Second, maximum flat efficiency over a wide bandwidth is achieved by employing the inductive feedback technique. The proposed design implemented in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.18 \mu \mathrm{m}$</tex> CMOS technology achieves more than 48% conversion efficiency at 18 dBm input power in the frequency range from 1.9 GHz to 4.1 GHz, with an active circuit size of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.5185 ~\text{mm}^{2}$</tex>.