Thermal Modeling and Improvement of 2.5D Chiplet-based Heterogeneous System with Thermal Through Silicon Via

2.5D chiplet-based systems, integrating heterogeneous chiplets manufactured at disparate technology nodes, have emerged as a promising solution for balancing cost and performance. However, thermal management remains a critical challenge. This study systematically investigates thermal-aware design optimization for chiplet-based systems through placement strategy analysis and thermal through silicon via (TTSV) parameters optimization. Six distinct chiplet placements are evaluated for a nine-chiplets system using finite element method (FEM) thermal simulations. Subsequent TTSV parametric analysis reveals an inverse correlation between via density and peak operating temperature, showing up to 15.5% thermal reduction in high-power scenarios. Simulation data identify feasible TTSV configurations (via-to-area ratio vs. peak temperature) within safe operating limits. This work provides empirical guidance for early-stage thermal design, emphasizing the interplay between chiplet and vertical interconnect density to ensure both performance and reliability in advanced packaging architectures.