HiRL-DCMPE: A Combined HiMOSS and RL Framework for Device Compact Model Parameter Extraction
The relentless scaling of semiconductor device technology has significantly increased the complexity and computational demands of device compact model (DCM) parameter extraction and model creation. The extraction workflow typically needs to simultaneously optimize hundreds of interdependent parameters while meeting stringent requirements for both computational efficiency and model physical accuracy. In this work, a new method that combines HiMOSS with RL algorithms for DCM parameter extraction is proposed. Specifically, we (i) propose HiRL-DCMPE, a novel algorithm that combines a modified Bayesian optimization and reinforcement learning. This framework narrows down the high-dimensional search space in the early stage and subsequently performs fine-grained optimization locally in the later stage. This not only improves the performance but also enhances the efficiency of the automated DCM parameter extraction; (ii) conduct experiments of parameter extraction task for both BSIMCMG and BSIMSOI models, and more than 100 parameters are extracted at once. It is shown that the RMSE of the created model output v.s. target data is < 5%, satisfying the needs of practical usage. In addition, the results outperform the benchmark algorithms by at least 20% in terms of RMSE value; and (iii) Overall, this framework improves the search efficiency and facilitates the optimal solution for complex DCM parameter extraction tasks. It takes at least 11.8% less time compared to the benchmark algorithm to reach the same accuracy level. These results demonstrate the great potential of HiRL-DCMPE for future DCM parameter extraction purpose.
Authors
- Zhaori Bi (ORCID: https://orcid.org/0000-0002-7315-3150)
- Fan Yang (ORCID: https://orcid.org/0000-0003-2164-8175)
- Xuan Zeng (ORCID: https://orcid.org/0000-0002-8097-4053)
- G. Xiao (ORCID: https://orcid.org/0000-0002-3718-9252)
- Lu Ye (ORCID: https://orcid.org/0000-0001-9601-6645)
- Shisheng Xiong (ORCID: https://orcid.org/0000-0002-7376-2132)
- Y. Zhou (ORCID: https://orcid.org/0000-0002-7868-6706)
Institutions
- Fudan University (CN)
- Shanghai Fudan Microelectronics (China) (CN)
Publication Details
- Published
- 2025-05-09
- DOI
- https://doi.org/10.1109/iseda65950.2025.11101165
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Natural Science Foundation of Shanghai
- National Natural Science Foundation of China
- Shanghai Municipal Education Commission