DSEAcc: A Fast and Flexible Design Space Exploration Framework for Approximate Accumulators

Approximate computing (AxC) has emerged as a key paradigm in the post-Moore era, particularly for data-intensive applications such as digital signal processing (DSP) and large language models (LLMs). In such applications, accumulation modules dominate both area and latency, often employing approximate adders. This paper proposes DSEAcc, an analytical error model based design space exploration (DSE) framework for large-scale approximate accumulators. DSEAcc enables efficient integration of AxC units by balancing computation quality and hardware costs. First, we define an extensible design space (DS) with a dataflow-aware quality model. Then, the Non-dominated Sorting Genetic Algorithm II (NSGA-II) is applied to find the Pareto front. Experiments on accumulators with 4–64 inputs show that DSEAcc achieves over 96% accuracy in computing quality estimation. It also reduces the exploration time by two orders of magnitude compared to Monte Carlo simulations. Moreover, the optimal configurations yield up to 39.70% area reduction while maintaining a sub-27-second runtime for Pareto front identification.