Spec2Doc2RTL: RTL Generation from Specification with Natural Language Representation

This paper presents Spec2Doc2RTL, a hierarchical LLM-based RTL code generation framework leveraging natural language as the intermediate design representation. To address the complexity of design hierarchies and circuit diversity, we propose a universal recursive decomposition method that transforms the circuit design process into the nested module implementations. We introduce a register-transfer-level (RTL) code generation pipeline from design specifications based on natural language representation, which includes two LLM-friendly stages: design document generation (Spec2Doc) and document-to-RTL translation (Doc2RTL). Moreover, a fully automated iterative design workflow is implemented, with script generation, testing, and debugging integrated. Experimental results demonstrate that Spec2Doc2RTL can generate a wide spectrum of circuits, from complex systems like CPUs and NTTs to foundational bottom-level modules with a competitive 78.8% accuracy on the Revisiting VerilogEval benchmark.