Point-Cap: An Efficient Model for Chip-Scale Interconnect Capacitance Extraction

In this paper, we present a PointNet++-based method for capacitance extraction (Point-Cap) of chip-scale interconnects with high efficiency and accuracy. By modeling the layout structure as point-cloud-like data, the process of gathering features of conductors to the net level can be done efficiently and automatically by our model and then utilized to predict precise total capacitance and coupling capacitance. Compared to the previous state-of-the-art work, GNN-Cap, Point-Cap reduces the average relative errors in the total capacitance and coupling capacitance calculations by 28.8% and 38.6%, respectively.

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Publication Details

Published
2025-05-09
DOI
https://doi.org/10.1109/iseda65950.2025.11101143
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
0.00

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article

Point-Cap: An Efficient Model for Chip-Scale Interconnect Capacitance Extraction

Tinghuan Chen, Yaohui Han, Fan Yang, Weizhe Zhang et al.
VLSI and Analog Circuit Testing
article

Point-Cap: An Efficient Model for Chip-Scale Interconnect Capacitance Extraction

Tinghuan Chen, Yaohui Han, Fan Yang, Weizhe Zhang, Qing Ye, Lihao Liu
article en

Abstract

In this paper, we present a PointNet++-based method for capacitance extraction (Point-Cap) of chip-scale interconnects with high efficiency and accuracy. By modeling the layout structure as point-cloud-like data, the process of gathering features of conductors to the net level can be done efficiently and automatically by our model and then utilized to predict precise total capacitance and coupling capacitance. Compared to the previous state-of-the-art work, GNN-Cap, Point-Cap reduces the average relative errors in the total capacitance and coupling capacitance calculations by 28.8% and 38.6%, respectively.

Fudan University (CN), Chinese University of Hong Kong, Shenzhen (CN), Shenzhen Academy of Aerospace Technology (CN)
National Natural Science Foundation of China, Research and Development
Affordable and clean energy
Openalex Percentile: Top 79%
VLSI and Analog Circuit Testing
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Point-Cap: An Efficient Model for Chip-Scale Interconnect Capacitance Extraction — Tinghuan Chen, Yaohui Han, et al. · (2025) | TGRS Research Map | TGRS