A 5.3-W 83.7% Peak Efficiency Simultaneous Wireless Power and Data Transfer IC Enabling 10 ^–9 BER 540-kb/s Data Rate or Output Voltage Regulation

This paper proposes the first simultaneous wireless power and data transfer (SWPDT) integrated circuit (IC) which exploits a Capacitive-Inductive Channel (CI-Channel), enabling concurrent power and data transmission. The communication across the CI-Channel can support data-only transmission or can be incorporated into the system control loop, allowing output voltage regulation through phase-shift control applied at the primary side. The proposed IC can be configured as primary side (power transmitter, P-TX, and data receiver, RX) or secondary side (power receiver, P-RX, and data transmitter, TX). In order to ensure communication robustness, unwanted disturbances are removed through specifically designed Power Blanking and Ringing Blanking circuits. The proposed SWPDT IC test-chip prototype was fabricated using a 130-nm BCD process and experimentally verified considering the complete wireless power transfer (WPT) system, including primary side, CI-Channel and secondary side. The overall system, targeting medium-power industrial applications, achieves a maximum 5.3-W output power, a peak efficiency of 83.7% and a load regulation of 0.09 mV/mA. Moreover, a 540 kb/s data rate with no transmission errors across <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{9}$</tex-math> </inline-formula> bit acquisitions, corresponding to a bit-error-rate (BER) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\lt 10^{-9}$</tex-math> </inline-formula>, was achieved.