TAFF-YOLO: An Enhanced YOLO Model With Transformer and Attention Feature Fusion for Chip Internal Defect Detection

Accurate and efficient detection of internal defects in chips is crucial for ensuring the reliability and yield of electronic products. However, conventional object detection models often struggle to identify such defects in ultrasonic images due to their extremely small size and low contrast. To overcome these challenges, a novel detection framework that combines image processing with a Transformer-based Attention Feature Fusion YOLO model (TAFF-YOLO) is proposed in this paper. The framework first employs image processing methods to extract individual chip images and then applies a handcrafted feature generation algorithm for data augmentation to mitigate overfitting. Subsequently, the TAFF-YOLO model is introduced for precise defect localization. Specifically, a Deformable Attention Background Suppression Module (DABSM) is integrated to enhance global contextual information and the receptive field for detecting small objects. Additionally, the feature fusion network (neck) is augmented with a ResBlock and Convolutional Block Attention Module (ResCBAM) to focus the model effectively on critical defect regions while suppressing irrelevant background noise. A Smooth Intersection over Union (SIoU) loss function further stabilizes the training and enhances localization accuracy. Experimental results from two private datasets and one public dataset demonstrate that the proposed method achieves an average precision of 90.9%, with a compact model size of 2.6 million parameters and an inference speed of 167.3 FPS, effectively balancing detection accuracy, model complexity, and processing speed. This indicates significant promise for real-time industrial chip inspection applications.

Authors

Institutions

Publication Details

Journal
IEEE Transactions on Semiconductor Manufacturing
Published
2025-08-08
DOI
https://doi.org/10.1109/tsm.2025.3597147
Citations
1
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.73
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

TAFF-YOLO: An Enhanced YOLO Model With Transformer and Attention Feature Fusion for Chip Internal Defect Detection

Weixiang Du, Wenxin Niu, Jianqiang Mei, Yue Li et al.
1 citations
IEEE Transactions on Semiconductor Manufacturing
Integrated Circuits and Semiconductor Failure Analysis
0.73
article

TAFF-YOLO: An Enhanced YOLO Model With Transformer and Attention Feature Fusion for Chip Internal Defect Detection

Weixiang Du, Wenxin Niu, Jianqiang Mei, Yue Li, Dawei Zhang, Fan Jia
article en
1 citations

Abstract

Accurate and efficient detection of internal defects in chips is crucial for ensuring the reliability and yield of electronic products. However, conventional object detection models often struggle to identify such defects in ultrasonic images due to their extremely small size and low contrast. To overcome these challenges, a novel detection framework that combines image processing with a Transformer-based Attention Feature Fusion YOLO model (TAFF-YOLO) is proposed in this paper. The framework first employs image processing methods to extract individual chip images and then applies a handcrafted feature generation algorithm for data augmentation to mitigate overfitting. Subsequently, the TAFF-YOLO model is introduced for precise defect localization. Specifically, a Deformable Attention Background Suppression Module (DABSM) is integrated to enhance global contextual information and the receptive field for detecting small objects. Additionally, the feature fusion network (neck) is augmented with a ResBlock and Convolutional Block Attention Module (ResCBAM) to focus the model effectively on critical defect regions while suppressing irrelevant background noise. A Smooth Intersection over Union (SIoU) loss function further stabilizes the training and enhances localization accuracy. Experimental results from two private datasets and one public dataset demonstrate that the proposed method achieves an average precision of 90.9%, with a compact model size of 2.6 million parameters and an inference speed of 167.3 FPS, effectively balancing detection accuracy, model complexity, and processing speed. This indicates significant promise for real-time industrial chip inspection applications.

IEEE Transactions on Semiconductor ManufacturingVol. 38(4)
Tianjin University of Technology and Education (CN), Danaher (United States) (US), Tianjin Economic-Technological Development Area (CN), Guangdong Province Special Equipment Testing and Research Institute Zhuhai Testing Institute (CN), Eastern Liaoning University (CN)
Affordable and clean energy
Openalex Percentile: Top 25%
Integrated Circuits and Semiconductor Failure Analysis
0.73
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.