Vertical GaN Trench MOSFETs With HfO₂/Al₂O₃ Layered Gate Dielectric

In this work, vertical GaN trench MOSFETs have been fabricated by implementing hafnium oxide (HfO2) layered with aluminum oxide (Al2O3) as gate dielectric to improve the device performance when compared to devices using Al2O3 only. The transistors with HfO2/Al2O3 layered gate dielectrics show up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3\times $ </tex-math></inline-formula> higher forward current, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5\times $ </tex-math></inline-formula> higher gate breakdown voltage and substantially reduced threshold voltage shift induced by gate forward voltage stress when compared to transistors using Al2O3 layered gate dielectric. Higher channel mobility (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim ~11.1$ </tex-math></inline-formula> cm2/Vs) and reduced<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state resistance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$3.1~\pm ~0$ </tex-math></inline-formula>.6 m<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega \cdot $ </tex-math></inline-formula> cm2) were also observed as a result of the improved gate module. Post-deposition temperature stability of pure HfO2 layers as well as layered dielectrics combining both HfO2 and Al2O3 is tested combined with plasma pre-deposition surface treatment of gallium nitride to reduce interface trap density. Metal-insulator-semiconductor capacitors have been used as test structures for quick electrical characterization. Pure HfO2 layers show stability up to 500 ° C and present a relative dielectric constant of 17.5 and breakdown electric field of 6.5 MV/cm. The layered dielectric features a lower relative dielectric constant of 12.8 while keeping the same temperature stability and breakdown field. Further, the flat band voltage shift induced by positive voltage stress is reduced while keeping a low interface state density. Such advantages are correlated to trench MOSFET performance improvement.