Low-Carry Unsigned Approximate Multiplie
With the advancement of technology, the energy consumption of computing devices continues to rise. As a new paradigm to address energy challenges in error-tolerant environments, approximate computing holds significant importance. This paper proposes an approximate multiplier—the Low-Carry Unsigned Approximate Multiplier (UAM8-FP), an 8×8 approximate multiplier design. The key innovation of UAM8-FP lies in its exclusive use of carry-free compressors, which drastically reduces carry propagation during partial product reduction and significantly accelerates partial product accumulation. The second core feature of UAM8-FP’s compressor strategy is its phasedependent adaptive compression technique, where compressors of varying approximation densities are deployed based on the sparsity of "1"s at different reduction stages. This approach not only enhances computational speed but also minimizes precision deviation probability. To further optimize performance, a third strategy is introduced: customized compressor allocation, where exact and approximate compressors are dynamically selected based on partial product distribution. By integrating carry reduction, staged approximation, and column-wise optimization, UAM8-FP achieves a balanced trade-off among speed, hardware cost, and accuracy. Compared to existing approximate multipliers, it demonstrates strong competitiveness, offering both academic and practical value.
Authors
- Qin Wang (ORCID: https://orcid.org/0000-0002-1142-1340)
Institutions
- Fuzhou University (CN)
Publication Details
- Published
- 2025-05-23
- DOI
- https://doi.org/10.1109/ecie65947.2025.11086642
- Primary Topic
- Low-power high-performance VLSI design
- Type
- article
- Field-Weighted Citation Impact
- 0.00