Compact K-Band CMOS Phase Shifter with Low Insertion Loss for Satellite Applications

In this paper, a K-Band switch-type 6-bit Phase Shifter for satellite communications is designed in 65-nm Complementary Mosfet (CMOS) process. Passive phase shifters have the drawback of a large chip size due to the significant area occupied by inductors. Therefore, in this paper, a phase shifter is designed using a novel chip reduction technique. Shunt transistor (TR) topology is utilized for phase-shift bits of 5.625°, T-type L-C-L topology is utilized phase shift bits of 11.25°, 22.5°, and 45°, while High-Low pass type topology is employed for 90° and 180°. Symmetric & Stack Inductor structure is used in T-type L-C-L topology to minimize chip area. Based on the simulation results, the designed 6-bit phase shifter has a root mean square (RMS) phase error of 1.44° and RMS amplitude error 0.93 dB. Phase error and amplitude error are 0.86° and 0.95 dB at the target frequency which is 17 GHz, respectively. Additionally, the average insertion loss is 6.04 dB and core chip area are 0.22mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.