AI Driven Fault Detection for Advanced Digital VLSI Systems

To ensure circuit performance and reliability in contemporary VLSI (Very Large-Scale Integration) devices, fault detection and localization are essential. This study introduces a hybrid approach that combines AI-based classification and hardware-based fault injection to create an AI-Driven Fault Detection and Localization System for digital VLSI circuits. By adding a scan chain method to Verilog to systematically inject and detect defects, the suggested system improves on conventional fault detection. This method uses nested loops in the Verilog testbench to automate dataset creation, in contrast to existing methods that rely on manual dataset generation and simple fault labelling. The dataset contains defect sites, expected and actual outputs, and combinations of inputs. The Random Classifier used for fault analysis is replaced by an optimized AI model (XG-Boost) trained on the provided dataset. The model accurately locates the malfunctioning gate, detects defects, and forecasts the actual outcome. To increase the accuracy of the model, hyperparameter adjustment is used. Furthermore, real-time fault identification is made possible by a manual input testing method, which gives users information about the position of problematic gates, fault status, and expected and actual outputs. The new system really does an excellent job of picking up on faults and pinpointing exactly where they are compared to older techniques. By combining hardware-based structured testing with AI-driven fault analysis, this methodology enhances the efficiency, scalability, and reliability of fault detection in digital VLSI circuits.