Process integration of High-Density Low-k dielectric material for enhanced plasma-induced damage-resistant performance
Selective barrier metal deposition was introduced to scale down the Cu barrier metal thickness, therefore reducing via resistance in back-end of line. Such an innovation, however, can cause plasma-induced damage to low-k dielectric, thereby degrading capacitance degradation in metal stack. We describe in this paper, process integration of high-density low-k dielectric material for enhanced plasma-induced damage-resistant performance, therefore maximizing the capacitance benefit of low-k dielectric material.
Authors
- S.E. Kim (ORCID: https://orcid.org/0009-0004-7281-1141)
- Kang Sub Yim
- Jong Min Baek (ORCID: https://orcid.org/0000-0001-5260-3821)
- K.-C. Park
- Taehwan Jeong
- Chin Kim
- Sanghyun Lee (ORCID: https://orcid.org/0000-0002-0826-9392)
- Taejung Kim
- Kwang Seok Lee (ORCID: https://orcid.org/0000-0002-4378-7902)
- Ki-Chul Park
- Jeong-Hoon Ahn
- D.W. Park
- Hee Sung Kang (ORCID: https://orcid.org/0000-0003-2865-9205)
- Gyuho Myeong
Institutions
- Samsung (South Korea) (KR)
Publication Details
- Published
- 2025-06-02
- DOI
- https://doi.org/10.1109/iitc66087.2025.11075371
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00