Design for Reliability Methodology for Automotive IC Quality Enhancement

To reduce product return rate due to high-resistance vias, design for reliability (DFR) methodology were developed based on investigation of Return Merchandise Authorization (RMA) chips manufactured in advanced automotive process nodes. Each RMA is very costly, especially for automotive chips. It not only delays product roll-out schedule but also requires plenty of resources from both Foundry and Design Company. The issue was immediately contained with tightening etch process control and later resolved with further optimization on film planarization. For future products, we implemented DFR rules to enhance the chip quality and minimize such kind of occurrence from the start.

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Publication Details

Published
2025-06-02
DOI
https://doi.org/10.1109/iitc66087.2025.11075364
Primary Topic
VLSI and Analog Circuit Testing
Type
article
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article

Design for Reliability Methodology for Automotive IC Quality Enhancement

Jian-Hung Lee, Tao Wang, Runzi Chang
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VLSI and Analog Circuit Testing
article

Design for Reliability Methodology for Automotive IC Quality Enhancement

Jian-Hung Lee, Tao Wang, Runzi Chang
article en

Abstract

To reduce product return rate due to high-resistance vias, design for reliability (DFR) methodology were developed based on investigation of Return Merchandise Authorization (RMA) chips manufactured in advanced automotive process nodes. Each RMA is very costly, especially for automotive chips. It not only delays product roll-out schedule but also requires plenty of resources from both Foundry and Design Company. The issue was immediately contained with tightening etch process control and later resolved with further optimization on film planarization. For future products, we implemented DFR rules to enhance the chip quality and minimize such kind of occurrence from the start.

Marvell (United States) (US)
Industry, innovation and infrastructure
Openalex Percentile: Top 79%
VLSI and Analog Circuit Testing
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