A $3-\mathrm{V}, 72-\mu \mathrm{W}$ and 0.042-\text{mm}^{2}$ Active-Area Dynamic Comparator in Flexible TFT Technology

This paper presents a dynamic comparator designed and simulated in a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.6-\mu \mathrm{m}$</tex> indium-gallium-zinc oxide (IGZO) thin-film transistor (TFT) process on a flexible substrate. The proposed circuit operates from a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3-\mathrm{V}$</tex> supply, consumes only <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$72 \mu ~\mathrm{W}$</tex> of power, and occupies a compact area of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$0.042 ~\text{mm}^{2}$</tex>. Building upon a double-tailed comparator topology adapted to an all-nTFT process, the design incorporates a fixed-bias preamplifier to enhance offset tolerance and mitigate kickback noise. Post-layout simulations confirm robust performance at clock frequencies up to 200 kHz, with an offset voltage below 10 mV across various process corners. These results highlight the feasibility of implementing high-performance mixed-signal circuits on flexible substrates, enabling applications in large-area, low-cost systems such as sensor interfaces and data converters.