Design of a Temperature-Aware Voltage Generator for 2-Bit Read Operation in STT-MRAM Based SIMPLY Architecture

This paper investigates the reliability of the 2-bit read operation under temperature variations in the Smart Material Implication (SIMPLY) Logic-in-Memory (LIM) scheme when implemented within a Spin-Transfer Torque Magnetic Random-Access Memory (STT-MRAM). To be executed, such an operation requires the generation of a proper reference voltage (<tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{V}_{\text {REF }}$</tex>). As a result of our study, such a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{V}_{\text {REF }}$</tex> must take a proportional to absolute temperature (PTAT) behavior to alleviate the detrimental temperature effect on the bit error rate. Accordingly, starting from a prior art subthreshold two-transistor (2T) reference circuit, a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text {REF }}$</tex> generator employing an 18T topology was designed in the adopted <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$65-\text{nm}$</tex> CMOS technology and its effect on the reliability of the 2-bit read operation was evaluated across temperatures.