Influence of Reduced Numerical Precision in Spiking Neural Network Hardware Implementation

This work presents a performance comparison of Spiking Neural Networks (SNNs) under reduced numerical precision. When implementing digital SNNs in hardware for edge inference, such as on FPGAs or ASICs, power and resource usage are crucial aspects to consider. Typically, networks are trained using single precision floating-point arithmetic to facilitate parameter convergence; consequently, the trained parameters are also in high computational resolution. However, this level of precision may be redundant for classification accuracy. A reduced word width offers significant benefits in terms of resource usage, balancing resolution with accuracy in a manner quantified in this study. The accuracy achieved on three different datasets of increasing complexity by three neuron discrete equation models of increasing dynamics is compared when applying post-training quantization (PTQ) with various resolutions to both fixed-point and minifloat reduced precision models. Results indicate that fixed-point numerical representation provides the best outcomes with negligible accuracy loss when quantizing network parameters to a word width ranging from 4 to 8 bits, depending on the task's complexity and the neuron dynamics.

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Published
2025-06-23
DOI
https://doi.org/10.1109/icicdt65192.2025.11078101
Citations
1
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.73
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Influence of Reduced Numerical Precision in Spiking Neural Network Hardware Implementation

Marcello De Matteis, Adrieli Alves Pereira Radaelli, Mattia Tambaro, Andrea La Gala et al.
1 citations
Advanced Memory and Neural Computing
0.73
article

Influence of Reduced Numerical Precision in Spiking Neural Network Hardware Implementation

Marcello De Matteis, Adrieli Alves Pereira Radaelli, Mattia Tambaro, Andrea La Gala, Lorenzo Stevenazzi, Mirco Malanchini
article en
1 citations

Abstract

This work presents a performance comparison of Spiking Neural Networks (SNNs) under reduced numerical precision. When implementing digital SNNs in hardware for edge inference, such as on FPGAs or ASICs, power and resource usage are crucial aspects to consider. Typically, networks are trained using single precision floating-point arithmetic to facilitate parameter convergence; consequently, the trained parameters are also in high computational resolution. However, this level of precision may be redundant for classification accuracy. A reduced word width offers significant benefits in terms of resource usage, balancing resolution with accuracy in a manner quantified in this study. The accuracy achieved on three different datasets of increasing complexity by three neuron discrete equation models of increasing dynamics is compared when applying post-training quantization (PTQ) with various resolutions to both fixed-point and minifloat reduced precision models. Results indicate that fixed-point numerical representation provides the best outcomes with negligible accuracy loss when quantizing network parameters to a word width ranging from 4 to 8 bits, depending on the task's complexity and the neuron dynamics.

University of Milano-Bicocca (IT)
Openalex Percentile: Top 25%
Advanced Memory and Neural Computing
0.73
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Influence of Reduced Numerical Precision in Spiking Neural Network Hardware Implementation — Marcello De Matteis, Adrieli Alves Pereira Radaelli, et al. · (2025) | TGRS Research Map | TGRS