Effect of Boundary Roughness on the Variability of the VAC of Silicon Field-Effect GAA Nanotransistors

The impact of various sources of variability on transistor performance is increasing as we move to 3D architectures, with the nonuniformity of the transistor surface area being one of the main factors contributing to this increase. In this paper, we study the variability of key parameters of undoped cylindrical silicon GAA (gate-all-around) field-effect transistors with different region lengths ranging from 25 to 10 nm to demonstrate the effect of scaling. The fluctuations of the characteristics are analyzed for two values of the correlation length of 10 and 20 nm and a range of root-mean-square boundary deviations in the range from 0.4 to 0.85 nm. For the key studied parameters—threshold voltage, Ion and Ioff currents—the values of the standard deviation for transistor structures with different channel lengths differ approximately by a factor of 2. At the same time, the patterns of variability of the key parameters have a functionally different character. The consequence of this is the nonscalability of methods for optimizing the influence of variability due to the effect of unevenness of the boundary.