FPGA-Based Convolutional Neural Network Implementation

Convolutional neural networks have significant advantages in areas such as image processing, and field-programmable gate arrays (FPGAs) are uniquely valuable in signal processing, where customized convolutional neural networks using FPGAs can improve inference parallelism. This paper focuses on the design of convolutional neural network acceleration based on AXI-Stream and pipelining, which is different from the traditional FPGA acceleration method and adopts a new structure adapted to video stream processing. The design of each layer module is elaborated in detail. The convolutional layer improves efficiency through data reuse and parallel computation; the pooling layer improves the structure to enhance the data reuse rate; and the up-sampling layer utilizes the back-pressure timing to control the transmission. The system is integrated by connecting the modules through buses and optimizing the links with the help of IP cores, while memory mapping reordering and convolutional weight reconstruction are carried out on the input channels to improve the computational efficiency. The research results are of great significance in promoting the efficient application of convolutional neural networks on FPGA platforms, and provide technical references for the further development of related fields.