Design of a Wide-Temperature and Low-Current Mismatch Charge Pump for Phase Locked Loop

This paper presents a novel wide-temperature and low-current mismatch charge pump circuit for modern communication systems requiring high-performance phase locked loop (PLL). When applied in a CMOS PLL, the proposed charge pump effectively suppresses phase error induced by non-idealities in the charge pump, thereby enhancing the overall PLL performance. The design employs a bias circuit to generate a temperature-independent charge pump current, effectively reducing phase error fluc-tuations caused by temperature variations. The core circuit of the charge pump incorporates transmission gates and an operational amplifier to achieve excellent current matching characteristics. Fabricated using a 180 nm CMOS process. Simulation results show that over a temperature range from -40°C to 175 °C, the output current variation remains within 49.86 μA to 50.16 μA, with a temperature coefficient of31 ppm/°C. Compared with conventional push-pull input charge pumps, the proposed design significantly extends the output voltage range under 0.01% current mismatch from 0.32 V to 2.4 V, achieving a 24.24% improvement.