Machine Learning-Enabled Fast Prediction of GGNMOS Performance and Inverse Design for Electrostatic Discharge Applications

Electrostatic discharge (ESD) protection is generally required in integrated circuit (IC) chips. The grounded-gate n-channel metal-oxide-semiconductor (GGNMOS) is a popular device for ESD protection in circuit design. However, the design optimization of GGNMOS for every circuit is carried out using the trail-and-error method and requiring iterative device simulations. The device simulation is usually performed using technology computer-aided design (TCAD) software and is time-consuming. To address this issue, we developed machine learning models for fast prediction of GGNMOS performance and inverse design of its structure according to performance metrics. Here, we generated data for machine learning using Sentaurus TCAD. We applied AutoML and weight-sharing deep neural networks to predict current-voltage (I-V) characteristics of GGNMOS and extract performance metrics: triggering point (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>t</i>1</sub>, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>t</i>1</sub>), holding point (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I_h</i>,<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> V_h</i>), thermal breakdown point (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">I</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>t</i>2</sub>, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i><sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><i>t</i>2</sub>), and discharge rsistance <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">R_on</i>. Additionally, Bayesian optimization was employed for inverse design, allowing rapid identification of optimal structural parameters for desired performance metrics. This approach significantly accelerates the ESD design process, minimizing dependency on costly and time-consuming TCAD simulations. Our work represents an advancement in design of electronic devices and circuits using machine learning.