Design of Reconfigurable Broadband Power Amplifier

This paper presents the design of a discrete reconfigurable broadband power amplifier based on the HiWafer 0.25µm GaAs pHEMT (Pseudomorphic High Electron Mobility Transistor) technology. The operating frequency spans the C, X, and Ku bands, supporting eight different configurations. The circuit uses a two-stage amplification topology, with both stages operating in Class AB mode. The driver stage uses a common-source configuration to provide sufficient input to the power stage, which also adopts a common-source topology. Additionally, the gate width of the power stage is expanded by connecting multiple transistors in parallel to enhance output power. For re-configurable impedance matching, a switching transistor is used to control an inductor in parallel with the circuit. This approach not only enables reconfigurability but also introduces a parasitic capacitance when the switch is off, thereby reducing the Q-factor of the inductor and expanding the matching bandwidth to some extent. Post-layout design and simulations demonstrate a flat gain across the operating frequency range, with a 1dB compression point of 8-15dBm at different operating frequencies. The maximum instantaneous bandwidth reaches up to 4GHz, with a maximum output power of 34.9dBm and output power exceeding 33.5dBm. The average power-added efficiency is 32%.

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Publication Details

Published
2025-07-11
DOI
https://doi.org/10.1109/eicct65471.2025.11099817
Primary Topic
Advanced Power Amplifier Design
Type
article
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article

Design of Reconfigurable Broadband Power Amplifier

Yuefeng Zhang, Zhangfa Liu
Advanced Power Amplifier Design
article

Design of Reconfigurable Broadband Power Amplifier

Yuefeng Zhang, Zhangfa Liu
article en

Abstract

This paper presents the design of a discrete reconfigurable broadband power amplifier based on the HiWafer 0.25µm GaAs pHEMT (Pseudomorphic High Electron Mobility Transistor) technology. The operating frequency spans the C, X, and Ku bands, supporting eight different configurations. The circuit uses a two-stage amplification topology, with both stages operating in Class AB mode. The driver stage uses a common-source configuration to provide sufficient input to the power stage, which also adopts a common-source topology. Additionally, the gate width of the power stage is expanded by connecting multiple transistors in parallel to enhance output power. For re-configurable impedance matching, a switching transistor is used to control an inductor in parallel with the circuit. This approach not only enables reconfigurability but also introduces a parasitic capacitance when the switch is off, thereby reducing the Q-factor of the inductor and expanding the matching bandwidth to some extent. Post-layout design and simulations demonstrate a flat gain across the operating frequency range, with a 1dB compression point of 8-15dBm at different operating frequencies. The maximum instantaneous bandwidth reaches up to 4GHz, with a maximum output power of 34.9dBm and output power exceeding 33.5dBm. The average power-added efficiency is 32%.

Beijing Jiaotong University (CN)
Affordable and clean energy
Openalex Percentile: Top 82%
Advanced Power Amplifier Design
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Design of Reconfigurable Broadband Power Amplifier — Yuefeng Zhang, Zhangfa Liu · (2025) | TGRS Research Map | TGRS