A wide power dynamic range CMOS rectifier with 85.5% peak efficiency and −19.1 dBm sensitivity for radio frequency energy harvesting

Abstract This paper presents a high-efficiency CMOS rectifier with high sensitivity and wide power dynamic range (WPDR). The proposed rectifier introduces a gate voltage self-tuning (GVST) technology, which can dynamically control the gate voltage of the rectifying transistors to regulate the conduction current, achieving an increase in forward current under low input power and suppressing leakage current under high input power. Besides, a dynamic and static substrate self-biasing technique is proposed to dynamically adjust the threshold voltage of the PMOS rectifying transistors, which helps to reduce the leakage current of the PMOS when it not conducting and increase the forward current when it conducting. Combining these two techniques, the proposed rectifier not only achieves a WPDR but also has a high sensitivity. For verification, we simulated this rectifier in a 40 nm CMOS process. The post-simulation results show that the proposed rectifier achieves a 85.5% peak power conversion efficiency (PCE) and a −19.1 dBm sensitivity at 1 V when operating at 433 MHz with a 100 kΩ load. In addition, the proposed rectifier has a 25.7 dB dynamic range (DR) for its PCE > 40%.